Direct Memory Access (DMA) is an interface that provides for transfer of data directly to and from random access memory (RAM) and a peripheral device, i.e. without using the processor or its registers. In general, the processor initializes the DMA channel by sending a memory address and the number of words to be transferred. The actual transfer of data is done directly between the peripheral unit and the memory unit through the DMA, freeing the processor for other tasks.
FIG. 1 is a block diagram which shows the relationship of a DMA channel among other components in a microcomputer system. The processor communicates with the DMA channel through the address and data buses as with any I/O interface unit. The DMA has its own address which activates the chips select (CS) and register select (RS) input lines. The processor initializes the DMA channel through the data bus by transferring the starting address and word (or byte) count to appropriate DMA registers. The processor then sends a control byte to inform the DMA to start the data transfer. When the peripheral unit sends a DMA request, the DMA channel activates its bus request (BR) line, informing the processor to release the buses. The processor responds with its bus granted (BG) line informing the DMA channel that the buses have been relinquished. The DMA channel then places the current value of its address register on the address bus, initiates a read (RD) or write (WR) signal, and sends a DMA acknowledge through the peripheral unit. When the peripheral unit receives the DMA acknowledge, it puts a word (or byte) on the data bus (for a write) or receives a word (or byte) from the data bus (for a read). Thus, the DMA channel controls the read or write operation and supplies the address in RAM. The peripheral unit can then communicate with the RAM through the data bus for direct transfer between the peripheral unit and the RAM while the microprocessor is momentarily disabled. The transfer can be made for an entire block of bytes, suspending the processor operation until the whole block is transferred, or the transfer can be made one byte at a time in between microprocessor instruction execution. Once the DMA channel stops transferring data, it disables its BR signal, which disables the BG signal in the processor, returning control of the buses to the processor.